Plans, provides resources for and directs activities in engineering function to meet schedules, standards, and cost. Cultivates and reinforces appropriate group values, norms and behaviors. Identifies and analyzes problems, plans, tasks, and solutions. Provides guidance on employee development, performance, and productivity issues. Plans and schedules daily tasks, uses judgement on a variety of problems requiring deviation from standard practices. Inadequacies and erroneous decisions would cause moderate inconvenience and expense.
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering. The position requires a BS, MS or PhD in Electrical or Computer Engineering or similar discipline and 10+ years of industry experience, including: -Top notch hands on experience in very high-speed PHY development -Industry trend understanding , familiarity with best in class technologies in power and performance -Deep experience in the Analog domain (DDR, CDR, PLL, CTLE, VGA DFE designs) and architecture domain (Simulink modeling, system architecture, signal processing techniques, CDR topologies etc) -Familiarity with Logic design and logic verification, structural design and layout -Strong Business acumen -Experience in managing and growing PHY teams -Experience working with many customers and stakeholders
Posting Statement
Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.
Position of Trust
This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Talent Consultant.
Join the Mixed-Signal IP Solutions Group at Intel as part of the Platform Engineering Group. We are looking for an experienced and hands-on technical leader to lead one of our PHY design teams. You will manage and grow our teams of PHY design dispersed in multiple US locations.
This role requires strong technical leadership, decision-making and execution skills and the ability to influence across the organization. The successful candidate will have excellent communication and leadership skills, top notch hands-on experience in very high-speed PHY development, Industry trend understanding , familiarity with best in class technologies in power and performance with a proven ability to develop and drive technical execution plans with challenging schedules. A deep understanding of the Analog domain and architecture domain will go a long way in helping this person succeed in this role.
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