MIG is hiring a global director of validation which will be responsible for improving the overall quality of our IP delivery. Key responsibilities of the position:- Delivers high quality IP to our partners- Plans, provides resources for and directs activities in engineering function to meet schedules, standards, and cost. - Cultivates and reinforces appropriate group values, norms and behaviors. - Identifies and analyzes problems, plans, tasks, and solutions. Provides guidance on employee development, performance, and productivity issues. - Establishes methodology improvements for the organization, working closely with internal and external stakeholders. - Improves productivity of the validation organization.- Establishes root cause for post silicon bugs and updates pre-silicon testing to prevent similar issues in the future.
Candidates must possess the minimum qualifications listed below to be considered for this position. Masters in Electrical/Electronic Engineering with at least 15 years of technical experience. Experience in SOC and mixed signal IP development, debug, RTL validation, Power/Perf validation and manufacturing validation. Experience in Emulation, Virtual Platform, Altera/Xilinx/Synopsys/Mentor/Cadence Tools Flow, HAPS, UPF and Low Power Flows. The successful candidate will be knowledgeable in Verilog, Specman, System Verilog UVM/OVM and have validation and debug experience including test writing/generation, checker development, coverage analysis, failure debug, and root cause analysis. The candidate will also need strong communication and collaboration skills, willingness to work with others and ability to tolerate ambiguity and highly complex decision environments.
Inside this Business Group
The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.
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