Director DFT Intel Santa Clara

Job Description
The position is in Intel's PEG centralized engineering group and part of the Client and Devices Design Group. The candidate will be responsible for forming a new centralized DFT group that focuses on architecture, IP and methodology development. The role also involves supporting multiple design teams and cross functional activities working with debug, post silicon and bring up teams.

Plans, provides resources for and directs activities in engineering function to meet schedules, standards, and cost. Cultivates and reinforces appropriate group values, norms and behaviors. Identifies and analyzes problems, plans, tasks, and solutions. Provides guidance on employee development, performance, and productivity issues. Plans and schedules daily tasks, uses judgement on a variety of problems requiring deviation from standard practices. Inadequacies and erroneous decisions would cause moderate inconvenience and expense.

This role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Talent Consultant.

BSEE and 12+ years in Design and DFT
MSEE and 10+ with experience DFT

To qualify, the candidate should have at least 12 years of DFT experience and managed medium to large size DFT teams. The candidate should also have experience in DFT EDA tools, architectures, IP development, vector generation, bring-up of Si to production ramp. The candidate will also support multiple design teams and understanding SOC design flows, complexity and design team needs is a must. The role will also include building the team and drive new methodologies and change inside Intel to deliver consistency and convergence in our DFT solutions.

The candidate should have a track record in delivering DFT solutions on multiple projects on complex SOC designs.