Wednesday, January 11, 2017

RFIC Design Engineer Apple Santa Clara

Job Description: • 2-minute read •
In this highly visible role, you will be at the center of a silicon design group with a critical impact on getting functional products to hundreds of millions of customers quickly.
Key Qualifications
Typically requires at least 3+ years of analog and mix signal design experience, with 3 years leading RF CMOS design.
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Direct experience designing and bringing into high volume production, ZIF RF transceivers in deep sub-micron RFCMOS technology, specifically for WLAN & BT applications including dual-band and MIMO WLAN applications. This includes design of on-chip LNAs and PAs as well as calibration methods associated with such high performance wireless systems and ZIF designs. Experience should also include understanding of DFT and DFM techniques for high volume production environment.
Deep understanding in system specification and able to work with system architects to translate system requirement into circuit requirement at IC level; Requires strong understanding of impact of modulation type to radio architecture and requirements.
Familiar with various RF transceiver architectures and their trade-offs; Demonstrate the capability to work with digital design group for an optimum partition between digital and analog domain;
Deep understanding of fundamentals of RF CMOS implementation, and basic building blocks, including LNAs, mixers, VCOs and DCOs, LO and PAs.
Deep understanding of RF device modeling, including but not limited to device noise parameters, inductor modeling. Insights into packaging effects, supply isolations, high frequency ESD structures, and circuit layout for optimum RF performance.
Requires strong knowledge of desense and able to work closely with board RF/HW/Antenna teams to optimize board layouts for desense mitigation. Also, has experience with desense mitigation with integrated PMUs/DSPs (i.e. substrate isolation, return loops, package isolation, frequency planning, etc).
Familiar with mix signal mode verification methodology.
Extensive experience in Si characterization and debug.
Ability to drive strong production test/QA methodologies.
Extensive experience in IP sourcing and management
Description

•Work with platform architects, system groups and digital design group to define the requirements for RF and baseband blocks based on the system requirement. •Work with technology team on process selection for the target device. •Work with the front end design and chip integration group to integrate the analog and mix-signal IPs into the chips •Design various component blocks of Tx and Rx signal path •Consult on RF analog issues across Apple

Education

•BSEE or MSEE or PhD

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